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| author | Stephen Boyd <sboyd@kernel.org> | 2018-12-13 12:07:54 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-12-13 12:07:54 +0300 |
| commit | 5b5bb7c77a87fd0f1b887dd3d44abf7d0fd579e7 (patch) | |
| tree | 654aa6d59e8e242125889102ef6dbd3d8ca51e04 /drivers/clk/tegra | |
| parent | 651022382c7f8da46cb4872a545ee1da6d097d2a (diff) | |
| parent | d0618247a80f0c1c5a522b93888f20d8f034ec09 (diff) | |
| download | linux-5b5bb7c77a87fd0f1b887dd3d44abf7d0fd579e7.tar.xz | |
Merge tag 'v4.21-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull rockchip clk driver updates from Heiko Stuebner:
- register fixes for rk3188 and rk3328
- one new critical clock for rk3188 and a fixed clock id (double used number)
- new clock id for rk3328
* tag 'v4.21-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: add clock-id to gate of ACODEC for rk3328
clk: rockchip: add clock ID of ACODEC for rk3328
clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328
clk: rockchip: fix I2S1 clock gate register for rk3328
clk: rockchip: make rk3188 hclk_vio_bus critical
clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering
clk: rockchip: fix rk3188 sclk_smc gate data
clk: rockchip: fix typo in rk3188 spdif_frac parent
Diffstat (limited to 'drivers/clk/tegra')
0 files changed, 0 insertions, 0 deletions