diff options
| author | Stephen Boyd <sboyd@codeaurora.org> | 2016-03-01 22:00:02 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-03-03 04:47:19 +0300 |
| commit | f6da46a3074722feb9b4069cf032b924c7251860 (patch) | |
| tree | a2c57ec8c4aabccf3aeaa6f5a3229f4421272d99 /drivers/clk/tegra/clk-tegra20.c | |
| parent | afb4bdc9d8987eb570ef0e9e608459d9fc016de5 (diff) | |
| download | linux-f6da46a3074722feb9b4069cf032b924c7251860.tar.xz | |
clk: tegra: Remove CLK_IS_ROOT
This flag is a no-op now. Remove usage of the flag.
Acked-by: Rhyland Klein <rklein@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra20.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra20.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 7a48e986c4c9..7ad63837694f 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -837,15 +837,13 @@ static void __init tegra20_periph_clk_init(void) clks[TEGRA20_CLK_PEX] = clk; /* cdev1 */ - clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, CLK_IS_ROOT, - 26000000); + clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, 0, 26000000); clk = tegra_clk_register_periph_gate("cdev1", "cdev1_fixed", 0, clk_base, 0, 94, periph_clk_enb_refcnt); clks[TEGRA20_CLK_CDEV1] = clk; /* cdev2 */ - clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, CLK_IS_ROOT, - 26000000); + clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, 0, 26000000); clk = tegra_clk_register_periph_gate("cdev2", "cdev2_fixed", 0, clk_base, 0, 93, periph_clk_enb_refcnt); clks[TEGRA20_CLK_CDEV2] = clk; @@ -879,8 +877,8 @@ static void __init tegra20_osc_clk_init(void) input_freq = tegra20_clk_measure_input_freq(); /* clk_m */ - clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT | - CLK_IGNORE_UNUSED, input_freq); + clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IGNORE_UNUSED, + input_freq); clks[TEGRA20_CLK_CLK_M] = clk; /* pll_ref */ |