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| author | Valentine Barshak <valentine.barshak@cogentembedded.com> | 2013-12-10 22:20:24 +0400 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-12-10 23:42:33 +0400 |
| commit | 64fe8abc7336e17f977bb38c4c261d24bfc5da17 (patch) | |
| tree | 58100f2a99c8e66fb887e73d8495c287118f5126 /drivers/clk/tegra/clk-pll.c | |
| parent | a9e4c7bb466b34b19ca71ee7383ca23bd37a88c5 (diff) | |
| download | linux-64fe8abc7336e17f977bb38c4c261d24bfc5da17.tar.xz | |
pinctrl: sh-pfc: pfc-r8a7790: Reorganize VIN0 data pins
This reorganizes and renames VIN0 data pin groups to cover
all possible configurations. There's total of eight data
pin groups, one per each configuration. Most of the groups
share the same pin/mux array. Only the 18-bit configuration
needs a separate pin/mux array since in combines interleaved
data pins.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Diffstat (limited to 'drivers/clk/tegra/clk-pll.c')
0 files changed, 0 insertions, 0 deletions