diff options
| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-08-22 19:44:06 +0400 |
|---|---|---|
| committer | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-11-26 20:45:40 +0400 |
| commit | d5ff89a82a6d272d210db68a9487877682c94a24 (patch) | |
| tree | c36ffdccfae461a88901eb3e470e7bea60eeb52f /drivers/clk/tegra/clk-periph-gate.c | |
| parent | 00c674e42c278e7af7b39b6c72dbbaa5e7ebd96c (diff) | |
| download | linux-d5ff89a82a6d272d210db68a9487877682c94a24.tar.xz | |
clk: tegra: simplify periph clock data
This patch determines the register bank for clock enable/disable and reset
based on the clock ID instead of hardcoding it in the tables describing the
clocks. This results in less data to be maintained in the tables, making the
code easier to understand. The full benefit of the change will be realized once
also other clocktypes will be table based.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-periph-gate.c')
| -rw-r--r-- | drivers/clk/tegra/clk-periph-gate.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c index bafee9895a24..f38f33e3c65d 100644 --- a/drivers/clk/tegra/clk-periph-gate.c +++ b/drivers/clk/tegra/clk-periph-gate.c @@ -151,12 +151,16 @@ const struct clk_ops tegra_clk_periph_gate_ops = { struct clk *tegra_clk_register_periph_gate(const char *name, const char *parent_name, u8 gate_flags, void __iomem *clk_base, - unsigned long flags, int clk_num, - struct tegra_clk_periph_regs *pregs, int *enable_refcnt) + unsigned long flags, int clk_num, int *enable_refcnt) { struct tegra_clk_periph_gate *gate; struct clk *clk; struct clk_init_data init; + struct tegra_clk_periph_regs *pregs; + + pregs = get_reg_bank(clk_num); + if (!pregs) + return ERR_PTR(-EINVAL); gate = kzalloc(sizeof(*gate), GFP_KERNEL); if (!gate) { |