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| author | Thierry Reding <treding@nvidia.com> | 2016-04-08 16:09:56 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-04-28 13:41:53 +0300 |
| commit | e8f6a68c508b5d1cc4612ada028d87c74ab279d5 (patch) | |
| tree | 47e8213aaf6ea3bf7286aa0eba891db80952824e /drivers/clk/tegra/clk-periph-gate.c | |
| parent | 27ed2f7e7ca5c38a8ce695e58e6cf270c26f370b (diff) | |
| download | linux-e8f6a68c508b5d1cc4612ada028d87c74ab279d5.tar.xz | |
clk: tegra: dfll: Make code more comprehensible
Rename some variables and structure fields to make the code more
comprehensible. Also change the prototype of internal functions to be
more in line with the OPP core functions.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-periph-gate.c')
0 files changed, 0 insertions, 0 deletions