Merge tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock updates from Maxime Ripard:

  - Support for one new SoC, the V3s
  - Conversion of two old SoCs to the new framework, the old sun5i family
    and the A80
  - A bunch of fixes

* tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (25 commits)
  ARM: dts: sun9i: Switch to new clock bindings
  clk: sunxi-ng: Add A80 Display Engine CCU
  clk: sunxi-ng: Add A80 USB CCU
  clk: sunxi-ng: Add A80 CCU
  clk: sunxi-ng: Support separately grouped PLL lock status register
  clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
  clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
  clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
  clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU
  clk: sunxi-ng: Call divider_round_rate if we only have a single parent
  ARM: gr8: Convert to CCU
  ARM: sun5i: Convert to CCU
  clk: sunxi-ng: Add sun5i CCU driver
  clk: sunxi-ng: Implement global pre-divider
  clk: sunxi-ng: Implement multiplier maximum
  clk: sunxi-ng: mult: Fix minimum in round rate
  clk: sunxi-ng: Implement factors offsets
  clk: sunxi-ng: multiplier: Add fractional support
  clk: sunxi-ng: add support for V3s CCU
  dt-bindings: add device binding for the CCU of Allwinner V3s
  ...

1 files changed, 7 insertions, 2 deletions

diff --git a/drivers/clk/sunxi-ng/ccu_common.c b/drivers/clk/sunxi-ng/ccu_common.c
index 51d4bac97ab3..6986e11e91b0 100644
--- a/drivers/clk/sunxi-ng/ccu_common.c
+++ b/drivers/clk/sunxi-ng/ccu_common.c
@@ -25,13 +25,18 @@ static DEFINE_SPINLOCK(ccu_lock);
 
 void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock)
 {
+	void __iomem *addr;
 	u32 reg;
 
 	if (!lock)
 		return;
 
-	WARN_ON(readl_relaxed_poll_timeout(common->base + common->reg, reg,
-					   reg & lock, 100, 70000));
+	if (common->features & CCU_FEATURE_LOCK_REG)
+		addr = common->base + common->lock_reg;
+	else
+		addr = common->base + common->reg;
+
+	WARN_ON(readl_relaxed_poll_timeout(addr, reg, reg & lock, 100, 70000));
 }
 
 int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,