diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2020-01-14 19:07:25 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-02-13 02:41:28 +0300 |
| commit | cc26ed7be46c5f5fa45f3df8161ed7ca3c4d318c (patch) | |
| tree | 628caa57eba05bb2e067eb5006b42be41d69e2da /drivers/clk/socfpga | |
| parent | bb6d3fb354c5ee8d6bde2d576eb7220ea09862b9 (diff) | |
| download | linux-cc26ed7be46c5f5fa45f3df8161ed7ca3c4d318c.tar.xz | |
clk: stratix10: use do_div() for 64-bit calculation
do_div() macro to perform u64 division and guards against overflow if
the result is too large for the unsigned long return type.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200114160726.19771-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/socfpga')
| -rw-r--r-- | drivers/clk/socfpga/clk-pll-s10.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c index 4705eb544f01..8d7b1d0c4664 100644 --- a/drivers/clk/socfpga/clk-pll-s10.c +++ b/drivers/clk/socfpga/clk-pll-s10.c @@ -39,7 +39,9 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk, /* read VCO1 reg for numerator and denominator */ reg = readl(socfpgaclk->hw.reg); refdiv = (reg & SOCFPGA_PLL_REFDIV_MASK) >> SOCFPGA_PLL_REFDIV_SHIFT; - vco_freq = (unsigned long long)parent_rate / refdiv; + + vco_freq = parent_rate; + do_div(vco_freq, refdiv); /* Read mdiv and fdiv from the fdbck register */ reg = readl(socfpgaclk->hw.reg + 0x4); |