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| author | Stephen Boyd <sboyd@kernel.org> | 2021-04-28 02:34:56 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-04-28 02:34:56 +0300 |
| commit | 3ba2d41dca14e1afbea0c41ba8164064df407c8b (patch) | |
| tree | 9952ff280826db3fcaf657b19579232d72021039 /drivers/clk/socfpga/stratix10-clk.h | |
| parent | bbc3b403b096220850b82e245a1e5f09b8b216a2 (diff) | |
| parent | 0ec3815a8c1d8fe7215b1748117ac14cbeeda453 (diff) | |
| download | linux-3ba2d41dca14e1afbea0c41ba8164064df407c8b.tar.xz | |
Merge branch 'clk-ralink' into clk-next
- Proper clk driver for Mediatek MT7621 SoCs
* clk-ralink:
MAINTAINERS: add MT7621 CLOCK maintainer
staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk'
staging: mt7621-dts: make use of new 'mt7621-clk'
clk: ralink: add clock driver for mt7621 SoC
dt: bindings: add mt7621-sysc device tree binding documentation
dt-bindings: clock: add dt binding header for mt7621 clocks
Diffstat (limited to 'drivers/clk/socfpga/stratix10-clk.h')
0 files changed, 0 insertions, 0 deletions