diff options
author | Martin Kaiser <martin@kaiser.cx> | 2017-01-26 00:42:25 +0300 |
---|---|---|
committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2017-01-27 15:30:00 +0300 |
commit | 02c952c8f95fd0adf1835704db95215f57cfc8e6 (patch) | |
tree | 035009e0d41cbde963d3340c557632c96f993441 /drivers/clk/samsung/clk-s3c2412.c | |
parent | 96a8d7536f2bdd0b2f587ebff9b73e744d02e05e (diff) | |
download | linux-02c952c8f95fd0adf1835704db95215f57cfc8e6.tar.xz |
clk: samsung: mark s3c...._clk_sleep_init() as __init
These functions are referencing s3c...._clk_regs[], which are marked as
__initdata. When compiling with CONFIG_DEBUG_SECTION_MISMATCH=y, this
produces warnings like
WARNING: vmlinux.o(.text+0x198350):
Section mismatch in reference from the function s3c2410_clk_sleep_init()
to the (unknown reference) .init.data:(unknown)
Mark the s3c...._clk_sleep_init() functions as __init in
order to fix this.
Fixes: ca2e90ac1809 ("clk: samsung: add clock controller driver for s3c2412")
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/clk/samsung/clk-s3c2412.c')
-rw-r--r-- | drivers/clk/samsung/clk-s3c2412.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-s3c2412.c b/drivers/clk/samsung/clk-s3c2412.c index ec873ee15d37..b8340a49921b 100644 --- a/drivers/clk/samsung/clk-s3c2412.c +++ b/drivers/clk/samsung/clk-s3c2412.c @@ -69,7 +69,7 @@ static struct syscore_ops s3c2412_clk_syscore_ops = { .resume = s3c2412_clk_resume, }; -static void s3c2412_clk_sleep_init(void) +static void __init s3c2412_clk_sleep_init(void) { s3c2412_save = samsung_clk_alloc_reg_dump(s3c2412_clk_regs, ARRAY_SIZE(s3c2412_clk_regs)); @@ -83,7 +83,7 @@ static void s3c2412_clk_sleep_init(void) return; } #else -static void s3c2412_clk_sleep_init(void) {} +static void __init s3c2412_clk_sleep_init(void) {} #endif static struct clk_div_table divxti_d[] = { |