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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-03-10 13:36:33 +0300 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-03-21 13:12:23 +0300 |
commit | 5f3a432a44b135db002d22446827cfa061fc0bfb (patch) | |
tree | 0f3293a0bb16ac90e5319ca6b963d31d779594e7 /drivers/clk/renesas/rcar-gen3-cpg.h | |
parent | c013fc7d23ca5b29f0cdc37d58b2466ead4fd5f6 (diff) | |
download | linux-5f3a432a44b135db002d22446827cfa061fc0bfb.tar.xz |
clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()
Pass the mode pin states from the SoC-specific CPG/MSSR driver to the
R-Car Gen3 CPG driver core, as their state will be needed to make some
core clock configuration decisions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/rcar-gen3-cpg.h')
-rw-r--r-- | drivers/clk/renesas/rcar-gen3-cpg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h index f788f481dd42..073be54b5d03 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.h +++ b/drivers/clk/renesas/rcar-gen3-cpg.h @@ -37,6 +37,6 @@ struct clk *rcar_gen3_cpg_clk_register(struct device *dev, const struct cpg_core_clk *core, const struct cpg_mssr_info *info, struct clk **clks, void __iomem *base); int rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config, - unsigned int clk_extalr); + unsigned int clk_extalr, u32 mode); #endif |