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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2021-06-30 10:30:06 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-07-19 11:53:53 +0300 |
| commit | 03fa6e4b2622035389a4beb9699551d63d130493 (patch) | |
| tree | af01ed1793c48dee9ca7b54c9bbef634876fffbd /drivers/clk/renesas/rcar-cpg-lib.h | |
| parent | eb829e549ba65e48b1c16ddecb892a32b366d5e4 (diff) | |
| download | linux-03fa6e4b2622035389a4beb9699551d63d130493.tar.xz | |
clk: renesas: r9a07g044: Add USB clocks/resets
Add clock/reset entries for USB PHY control, USB2.0 host and device.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210630073013.22415-5-biju.das.jz@bp.renesas.com
[geert: s/usb0_device/usb0_func]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/rcar-cpg-lib.h')
0 files changed, 0 insertions, 0 deletions