diff options
| author | Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2021-03-09 19:55:38 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-03-10 12:49:20 +0300 |
| commit | c66424ea75640a205c34d0ba6986307179516fd4 (patch) | |
| tree | cab7d839fe50e6e85883228642c3fd345b0b72b2 /drivers/clk/renesas/r8a779a0-cpg-mssr.c | |
| parent | c52f4f839a33b1757aae25af41fc0037645e341c (diff) | |
| download | linux-c66424ea75640a205c34d0ba6986307179516fd4.tar.xz | |
clk: renesas: r8a779a0: Add TSC clock
Implement support for the TSC clock on V3U.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210309165538.2682268-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/r8a779a0-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r8a779a0-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index 33e44621a33a..12607a793143 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -237,6 +237,7 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { DEF_MOD("pfc1", 916, R8A779A0_CLK_CP), DEF_MOD("pfc2", 917, R8A779A0_CLK_CP), DEF_MOD("pfc3", 918, R8A779A0_CLK_CP), + DEF_MOD("tsc", 919, R8A779A0_CLK_CL16MCK), DEF_MOD("vspx0", 1028, R8A779A0_CLK_S1D1), DEF_MOD("vspx1", 1029, R8A779A0_CLK_S1D1), DEF_MOD("vspx2", 1030, R8A779A0_CLK_S1D1), |