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authorGeert Uytterhoeven <geert+renesas@glider.be>2018-11-21 12:44:16 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-12-04 12:29:46 +0300
commitf70f4be7339dfca0ef684046c1583cce61b039fc (patch)
tree41de3e99ea8cb6532f88fac3473d8ba22d8c9cc2 /drivers/clk/renesas/r8a77965-cpg-mssr.c
parentf51389cb6a976e1a6edd0289ea5406c462021bc5 (diff)
downloadlinux-f70f4be7339dfca0ef684046c1583cce61b039fc.tar.xz
clk: renesas: r8a77965: Add CPEX clock
Implement support for the CPEX clock on R-Car M3-N. This clock can be selected as a clock source for CMT1 (Compare Match Timer Type 1). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/renesas/r8a77965-cpg-mssr.c')
-rw-r--r--drivers/clk/renesas/r8a77965-cpg-mssr.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 1fcc411502da..eb1cca58a1e1 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -100,6 +100,7 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
DEF_FIXED("cl", R8A77965_CLK_CL, CLK_PLL1_DIV2, 48, 1),
DEF_FIXED("cp", R8A77965_CLK_CP, CLK_EXTAL, 2, 1),
+ DEF_FIXED("cpex", R8A77965_CLK_CPEX, CLK_EXTAL, 2, 1),
DEF_DIV6P1("canfd", R8A77965_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
DEF_DIV6P1("csi0", R8A77965_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),