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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-08 11:50:03 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-08 11:50:03 +0300 |
| commit | fbf4ae93c2bca96035b2c36f408b0616403ede10 (patch) | |
| tree | 497b39b3754dc4f344312fb4f2208e38e9505da4 /drivers/clk/renesas/Makefile | |
| parent | 678eb67513a963e5ce00a4ed6a07a5722bd1267e (diff) | |
| parent | 4decd2e54b61686787f36b727d2772e067a46ea5 (diff) | |
| download | linux-fbf4ae93c2bca96035b2c36f408b0616403ede10.tar.xz | |
Merge tag 'renesas-r9a07g054-dt-binding-defs-tag' into renesas-clk-for-v5.18
Renesas RZ/V2L DT Binding Definitions
Clock definitions for the Renesas RZ/V2L (R9A07G054) SoC, shared by
driver and DT source files.
Diffstat (limited to 'drivers/clk/renesas/Makefile')
0 files changed, 0 insertions, 0 deletions