diff options
| author | Taniya Das <quic_tdas@quicinc.com> | 2022-10-19 09:05:35 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-10-28 03:23:29 +0300 |
| commit | ffa20aa581cf5377fc397b0d0ff9d67ea823629b (patch) | |
| tree | 3e241be9cc86cfbabaffc5f98ba4715a99422c37 /drivers/clk/qcom/gcc-sc7280.c | |
| parent | 774560cf28fe115f106b6176c54ec641491136ac (diff) | |
| download | linux-ffa20aa581cf5377fc397b0d0ff9d67ea823629b.tar.xz | |
clk: qcom: Update the force mem core bit for GPU clocks
There are few GPU clocks which are powering up the memories
and thus enable the FORCE_MEM_PERIPH always for these clocks
to force the periph_on signal to remain active during halt
state of the clock.
Fixes: a3cc092196ef ("clk: qcom: Add Global Clock controller (GCC) driver for SC7280")
Fixes: 3e0f01d6c7e7 ("clk: qcom: Add graphics clock controller driver for SC7280")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com>
Link: https://lore.kernel.org/r/1666159535-6447-1-git-send-email-quic_c_skakit@quicinc.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/gcc-sc7280.c')
| -rw-r--r-- | drivers/clk/qcom/gcc-sc7280.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c index 8afb7575e712..46d41ebce2b0 100644 --- a/drivers/clk/qcom/gcc-sc7280.c +++ b/drivers/clk/qcom/gcc-sc7280.c @@ -3467,6 +3467,7 @@ static int gcc_sc7280_probe(struct platform_device *pdev) regmap_update_bits(regmap, 0x28004, BIT(0), BIT(0)); regmap_update_bits(regmap, 0x28014, BIT(0), BIT(0)); regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0)); + regmap_update_bits(regmap, 0x7100C, BIT(13), BIT(13)); ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, ARRAY_SIZE(gcc_dfs_clocks)); |