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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-11-05 23:59:36 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-11-05 23:59:36 +0300 |
commit | f66477a0aeb77f97a7de5f791700dadc42f3f792 (patch) | |
tree | 0a49febcf211c33948be618860eb3d545b7c6608 /drivers/clk/qcom/gcc-apq8084.c | |
parent | 400c5bd5a5b1faf3089322ace58b974446a8ddc3 (diff) | |
parent | e5bf1991ea62b4f4fc906d0828f7eed988fc3835 (diff) | |
download | linux-f66477a0aeb77f97a7de5f791700dadc42f3f792.tar.xz |
Merge tag 'clk-for-linus-20151104' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The majority of the changes are driver updates and new device support.
The core framework is mostly unchanged this time around, with only a
couple patches to expose a clk provider API and make getting clk
parent names from DT more robust.
Driver updates:
- Support for clock controllers found on Broadcom Northstar SoCs and
bcm2835 SoC
- Support for Allwinner audio clocks
- A few cleanup patches for Tegra drivers and support for the highest
DFLL frequencies on Tegra124
- Samsung exynos7 fixes and improvements
- i.Mx SoC updates to add a few missing clocks and keep debug uart
clocks on during kernel intialization
- Some mediatek cleanups and support for more subsystem clocks
- Support for msm8916 gpu/audio clocks and qcom's GDSC power domain
controllers
- A new driver for the Silabs si514 clock chip"
* tag 'clk-for-linus-20151104' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (143 commits)
clk: qcom: msm8960: Fix dsi1/2 halt bits
clk: lpc18xx-cgu: fix potential system hang when disabling unused clocks
clk: lpc18xx-ccu: fix potential system hang when disabling unused clocks
clk: Add clk_hw_is_enabled() for use by clk providers
clk: Add stubs for of_clk_*() APIs when CONFIG_OF=n
clk: versatile-icst: fix memory leak
clk: Remove clk_{register,unregister}_multiplier()
clk: iproc: define Broadcom NS2 iProc clock binding
clk: iproc: define Broadcom NSP iProc clock binding
clk: ns2: add clock support for Broadcom Northstar 2 SoC
clk: iproc: Separate status and control variables
clk: iproc: Split off dig_filter
clk: iproc: Add PLL base write function
clk: nsp: add clock support for Broadcom Northstar Plus SoC
clk: iproc: Add PWRCTRL support
clk: cygnus: Convert all macros to all caps
ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled
clk: imx31: add missing of_node_put
clk: imx27: add missing of_node_put
clk: si5351: add missing of_node_put
...
Diffstat (limited to 'drivers/clk/qcom/gcc-apq8084.c')
-rw-r--r-- | drivers/clk/qcom/gcc-apq8084.c | 49 |
1 files changed, 42 insertions, 7 deletions
diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c index 3563019b8e3c..1567c3a79534 100644 --- a/drivers/clk/qcom/gcc-apq8084.c +++ b/drivers/clk/qcom/gcc-apq8084.c @@ -31,6 +31,7 @@ #include "clk-rcg.h" #include "clk-branch.h" #include "reset.h" +#include "gdsc.h" enum { P_XO, @@ -3254,6 +3255,38 @@ static struct clk_branch gcc_usb_hsic_system_clk = { }, }; +static struct gdsc usb_hs_hsic_gdsc = { + .gdscr = 0x404, + .pd = { + .name = "usb_hs_hsic", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc pcie0_gdsc = { + .gdscr = 0x1ac4, + .pd = { + .name = "pcie0", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc pcie1_gdsc = { + .gdscr = 0x1b44, + .pd = { + .name = "pcie1", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc usb30_gdsc = { + .gdscr = 0x1e84, + .pd = { + .name = "usb30", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + static struct clk_regmap *gcc_apq8084_clocks[] = { [GPLL0] = &gpll0.clkr, [GPLL0_VOTE] = &gpll0_vote, @@ -3447,6 +3480,13 @@ static struct clk_regmap *gcc_apq8084_clocks[] = { [GCC_USB_HSIC_SYSTEM_CLK] = &gcc_usb_hsic_system_clk.clkr, }; +static struct gdsc *gcc_apq8084_gdscs[] = { + [USB_HS_HSIC_GDSC] = &usb_hs_hsic_gdsc, + [PCIE0_GDSC] = &pcie0_gdsc, + [PCIE1_GDSC] = &pcie1_gdsc, + [USB30_GDSC] = &usb30_gdsc, +}; + static const struct qcom_reset_map gcc_apq8084_resets[] = { [GCC_SYSTEM_NOC_BCR] = { 0x0100 }, [GCC_CONFIG_NOC_BCR] = { 0x0140 }, @@ -3555,6 +3595,8 @@ static const struct qcom_cc_desc gcc_apq8084_desc = { .num_clks = ARRAY_SIZE(gcc_apq8084_clocks), .resets = gcc_apq8084_resets, .num_resets = ARRAY_SIZE(gcc_apq8084_resets), + .gdscs = gcc_apq8084_gdscs, + .num_gdscs = ARRAY_SIZE(gcc_apq8084_gdscs), }; static const struct of_device_id gcc_apq8084_match_table[] = { @@ -3581,15 +3623,8 @@ static int gcc_apq8084_probe(struct platform_device *pdev) return qcom_cc_probe(pdev, &gcc_apq8084_desc); } -static int gcc_apq8084_remove(struct platform_device *pdev) -{ - qcom_cc_remove(pdev); - return 0; -} - static struct platform_driver gcc_apq8084_driver = { .probe = gcc_apq8084_probe, - .remove = gcc_apq8084_remove, .driver = { .name = "gcc-apq8084", .of_match_table = gcc_apq8084_match_table, |