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authorKonrad Dybcio <konrad.dybcio@somainline.org>2022-09-21 03:13:01 +0300
committerBjorn Andersson <andersson@kernel.org>2022-09-28 06:25:57 +0300
commitdc99bbfe48e4f3b4827dc5b04a8642c23a12917e (patch)
tree795107761eaea5a08bc188ff54f12a588f53b03b /drivers/clk/qcom/clk-alpha-pll.c
parente3ae3e899aa0322ff685fd7cf1322c6670da7db7 (diff)
downloadlinux-dc99bbfe48e4f3b4827dc5b04a8642c23a12917e.tar.xz
clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bit
This is used on at least SM6375 and its variations. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921001303.56151-1-konrad.dybcio@somainline.org
Diffstat (limited to 'drivers/clk/qcom/clk-alpha-pll.c')
-rw-r--r--drivers/clk/qcom/clk-alpha-pll.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 34bb93b66357..1973d79c9465 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -27,6 +27,7 @@
# define PLL_VOTE_FSM_RESET BIT(21)
# define PLL_UPDATE BIT(22)
# define PLL_UPDATE_BYPASS BIT(23)
+# define PLL_FSM_LEGACY_MODE BIT(24)
# define PLL_OFFLINE_ACK BIT(28)
# define ALPHA_PLL_ACK_LATCH BIT(29)
# define PLL_ACTIVE_FLAG BIT(30)
@@ -1123,6 +1124,10 @@ void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
}
+ if (pll->flags & SUPPORTS_FSM_LEGACY_MODE)
+ regmap_update_bits(regmap, PLL_MODE(pll), PLL_FSM_LEGACY_MODE,
+ PLL_FSM_LEGACY_MODE);
+
regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,
PLL_UPDATE_BYPASS);