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| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2019-12-27 04:42:05 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-02-24 10:34:45 +0300 |
| commit | aec48d8d0e6e291f61d0a0741bef2f8cc0712584 (patch) | |
| tree | 1cb25fe0a7d7e146c9e903a5cf9526de6e82846b /drivers/clk/pistachio | |
| parent | e4c1f72b72e140ed14a1f825916e918c144e0dfe (diff) | |
| download | linux-aec48d8d0e6e291f61d0a0741bef2f8cc0712584.tar.xz | |
clk: uniphier: Add SCSSI clock gate for each channel
[ Upstream commit 1ec09a2ec67a0baa46a3ccac041dbcdbc6db2cb9 ]
SCSSI has clock gates for each channel in the SoCs newer than Pro4,
so this adds missing clock gates for channel 1, 2 and 3. And more, this
moves MCSSI clock ID after SCSSI.
Fixes: ff388ee36516 ("clk: uniphier: add clock frequency support for SPI")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Link: https://lkml.kernel.org/r/1577410925-22021-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/clk/pistachio')
0 files changed, 0 insertions, 0 deletions