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authorChen-Yu Tsai <wens@csie.org>2016-01-25 16:15:47 +0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-01-29 13:30:29 +0300
commit8f2bf2ad9673e187b5c2956497003f60e0885e5d (patch)
treeedd676725c6047f1f58f46de2998e2b61c4d6f7e /drivers/clk/meson
parent3ca2377b6fed7c3db0c064ea73327cc6895e175d (diff)
downloadlinux-8f2bf2ad9673e187b5c2956497003f60e0885e5d.tar.xz
clk: sunxi: rewrite sun8i-a23-mbus-clk using the simpler composite clk
sun8i-a23-mbus-clk used sunxi's factors clk, which is nice for very complicated clocks, but is not really needed here. Convert sun8i-a23-mbus-clk to use clk_composite, as it is a gate + mux + divider. This makes the code easier to understand. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/meson')
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