diff options
| author | Jerome Brunet <jbrunet@baylibre.com> | 2018-02-19 14:21:45 +0300 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2018-03-13 12:09:58 +0300 |
| commit | 05f814402d6174369b3b29832cbb5eb5ed287059 (patch) | |
| tree | 55806276dd6ea4734e2ec86238680c4e4ec06961 /drivers/clk/meson/meson8b.h | |
| parent | 513b67ac39b0ef91761d94d1d6e31bb84e380744 (diff) | |
| download | linux-05f814402d6174369b3b29832cbb5eb5ed287059.tar.xz | |
clk: meson: add fdiv clock gates
Fdiv fixed dividers clocks of the fixed_pll can actually gate
independently. We never had an issue so far because these clocks
were provided 'enabled' by the bootloader.
Add these gates to enable/disable the clocks when required.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/meson8b.h')
| -rw-r--r-- | drivers/clk/meson/meson8b.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h index 839ffc9da5f7..6e414bd36981 100644 --- a/drivers/clk/meson/meson8b.h +++ b/drivers/clk/meson/meson8b.h @@ -78,8 +78,13 @@ #define CLKID_CPU_SCALE_DIV 102 #define CLKID_CPU_SCALE_OUT_SEL 103 #define CLKID_MPLL_PREDIV 104 +#define CLKID_FCLK_DIV2_DIV 105 +#define CLKID_FCLK_DIV3_DIV 106 +#define CLKID_FCLK_DIV4_DIV 107 +#define CLKID_FCLK_DIV5_DIV 108 +#define CLKID_FCLK_DIV7_DIV 109 -#define CLK_NR_CLKS 105 +#define CLK_NR_CLKS 110 /* * include the CLKID and RESETID that have |