diff options
| author | Neil Armstrong <narmstrong@baylibre.com> | 2017-05-24 12:43:45 +0300 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2017-05-29 15:34:23 +0300 |
| commit | 14c735c8e3082714e3d5fa91843692a9c871cebe (patch) | |
| tree | 8ffc3fb447f46d23da4cdc94a1de9c136b8cf90f /drivers/clk/meson/gxbb.h | |
| parent | 39c42ca9b2c63348e6179f0955358d7b6a75c186 (diff) | |
| download | linux-14c735c8e3082714e3d5fa91843692a9c871cebe.tar.xz | |
clk: meson-gxbb: Add EE 32K Clock for CEC
On Amlogic GX SoCs, there is two CEC controllers :
- An Amlogic CEC custom in the AO domain
- The Synopsys HDMI-TX Controller in the EE domain
Each of these controllers needs a 32.768KHz clock, but there is two paths :
- In the EE domain, the "32k_clk" this patchs is adding
- In the AO domain, with a more complex dual divider more precise setup
The AO 32K clock support will be pushed later in the corresponding
gxbb-aoclk driver when the AE CEC driver is ready.
The EE 32k_clk must be pushed earlier since mainline support for CEC in the
Synopsys HDMI-TX controller is nearby.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[Rebased patch on top of last changes]
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/gxbb.h')
| -rw-r--r-- | drivers/clk/meson/gxbb.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 70f029a518c0..d63e77e8433d 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h @@ -284,8 +284,11 @@ #define CLKID_CTS_MCLK_I958_SEL 111 #define CLKID_CTS_MCLK_I958_DIV 112 /* CLKID_CTS_I958 */ +#define CLKID_32K_CLK 114 +#define CLKID_32K_CLK_SEL 115 +#define CLKID_32K_CLK_DIV 116 -#define NR_CLKS 114 +#define NR_CLKS 117 /* include the CLKIDs that have been made part of the stable DT binding */ #include <dt-bindings/clock/gxbb-clkc.h> |