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authorJames Liao <jamesjj.liao@mediatek.com>2015-07-10 06:39:15 +0300
committerJames Liao <jamesjj.liao@mediatek.com>2015-10-01 07:04:49 +0300
commit4fa043806a2cdbf86503068276ab9bba91a726f6 (patch)
tree4f878df90b90187c39b96290c7868e626cecf997 /drivers/clk/mediatek/clk-mtk.c
parente02940fc9ed323ae512f3ded62abaf9d6a3d3265 (diff)
downloadlinux-4fa043806a2cdbf86503068276ab9bba91a726f6.tar.xz
clk: mediatek: Add fixed clocks support for Mediatek SoC.
This patch adds fixed clocks support by using CCF fixed-rate clock implementation. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mtk.c')
-rw-r--r--drivers/clk/mediatek/clk-mtk.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 268b6ff23aec..cf08db6c130c 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -49,6 +49,29 @@ err_out:
return NULL;
}
+void __init mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks,
+ int num, struct clk_onecell_data *clk_data)
+{
+ int i;
+ struct clk *clk;
+
+ for (i = 0; i < num; i++) {
+ const struct mtk_fixed_clk *rc = &clks[i];
+
+ clk = clk_register_fixed_rate(NULL, rc->name, rc->parent,
+ rc->parent ? 0 : CLK_IS_ROOT, rc->rate);
+
+ if (IS_ERR(clk)) {
+ pr_err("Failed to register clk %s: %ld\n",
+ rc->name, PTR_ERR(clk));
+ continue;
+ }
+
+ if (clk_data)
+ clk_data->clks[rc->id] = clk;
+ }
+}
+
void __init mtk_clk_register_factors(const struct mtk_fixed_factor *clks,
int num, struct clk_onecell_data *clk_data)
{