diff options
author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2013-12-24 17:38:26 +0400 |
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committer | Haojian Zhuang <haojian.zhuang@gmail.com> | 2014-03-19 11:31:27 +0400 |
commit | 75af25f581b1ffc63e06cb01547b3141d4cd5f58 (patch) | |
tree | 12add3b2c60c2ff96f2378ef8860bae9f6a8f23f /drivers/clk/hisilicon/clk-hi3620.c | |
parent | d3e6573c48f4472147b37e92cb345271e04d34d9 (diff) | |
download | linux-75af25f581b1ffc63e06cb01547b3141d4cd5f58.tar.xz |
clk: hisi: remove static variable
Remove the static variable. So these common clock register helper could
be used in more SoCs.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Diffstat (limited to 'drivers/clk/hisilicon/clk-hi3620.c')
-rw-r--r-- | drivers/clk/hisilicon/clk-hi3620.c | 25 |
1 files changed, 8 insertions, 17 deletions
diff --git a/drivers/clk/hisilicon/clk-hi3620.c b/drivers/clk/hisilicon/clk-hi3620.c index f24ad6a3a797..cc6dff19d6e4 100644 --- a/drivers/clk/hisilicon/clk-hi3620.c +++ b/drivers/clk/hisilicon/clk-hi3620.c @@ -210,33 +210,24 @@ static struct hisi_gate_clock hi3620_seperated_gate_clks[] __initdata = { static void __init hi3620_clk_init(struct device_node *np) { - void __iomem *base; + struct hisi_clock_data *clk_data; - if (np) { - base = of_iomap(np, 0); - if (!base) { - pr_err("failed to map Hi3620 clock registers\n"); - return; - } - } else { - pr_err("failed to find Hi3620 clock node in DTS\n"); + clk_data = hisi_clk_init(np, HI3620_NR_CLKS); + if (!clk_data) return; - } - - hisi_clk_init(np, HI3620_NR_CLKS); hisi_clk_register_fixed_rate(hi3620_fixed_rate_clks, ARRAY_SIZE(hi3620_fixed_rate_clks), - base); + clk_data); hisi_clk_register_fixed_factor(hi3620_fixed_factor_clks, ARRAY_SIZE(hi3620_fixed_factor_clks), - base); + clk_data); hisi_clk_register_mux(hi3620_mux_clks, ARRAY_SIZE(hi3620_mux_clks), - base); + clk_data); hisi_clk_register_divider(hi3620_div_clks, ARRAY_SIZE(hi3620_div_clks), - base); + clk_data); hisi_clk_register_gate_sep(hi3620_seperated_gate_clks, ARRAY_SIZE(hi3620_seperated_gate_clks), - base); + clk_data); } CLK_OF_DECLARE(hi3620_clk, "hisilicon,hi3620-clock", hi3620_clk_init); |