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| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | 2017-02-07 23:28:15 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-02-10 20:21:30 +0300 |
| commit | 33707260422475385c6f33f526c71805a3dc5dab (patch) | |
| tree | 21b3410462e936969a96f5332a3cadc138350677 /drivers/clk/clk-stm32f4.c | |
| parent | 48239135dd3fd4c5e90ae74cba79d798a9792238 (diff) | |
| download | linux-33707260422475385c6f33f526c71805a3dc5dab.tar.xz | |
clk: mvebu: Expand mv98dx3236-core-clock support
The initial implementation in commit e120c17a70e5 ("clk: mvebu: support
for 98DX3236 SoC") hardcoded a fixed value for the main PLL frequency.
Port code from the Marvell supplied Linux kernel to support different
PLL frequencies and provide clock gating support.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/clk-stm32f4.c')
0 files changed, 0 insertions, 0 deletions