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| author | Bjorn Helgaas <bhelgaas@google.com> | 2014-01-04 05:26:58 +0400 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-01-07 04:49:22 +0400 |
| commit | e501b3d87f003dfad8fcbd0f55ae17ea52495a56 (patch) | |
| tree | 1307d77ead535d134b6f62df53c923cf1247baa6 /drivers/char/agp/nvidia-agp.c | |
| parent | 06cf56e497c8c1469b0931caa7d5b1d827655fe2 (diff) | |
| download | linux-e501b3d87f003dfad8fcbd0f55ae17ea52495a56.tar.xz | |
agp: Support 64-bit APBASE
Per the AGP 3.0 spec, APBASE is a standard PCI BAR and may be either 32
bits or 64 bits wide. Many drivers read APBASE directly, but they only
handled 32-bit BARs.
The PCI core reads APBASE at enumeration-time. Use pci_bus_address()
instead of reading it again in the driver. This works correctly for both
32-bit and 64-bit BARs.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/char/agp/nvidia-agp.c')
| -rw-r--r-- | drivers/char/agp/nvidia-agp.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/char/agp/nvidia-agp.c b/drivers/char/agp/nvidia-agp.c index be42a2312dc9..ab65d55272c4 100644 --- a/drivers/char/agp/nvidia-agp.c +++ b/drivers/char/agp/nvidia-agp.c @@ -115,9 +115,8 @@ static int nvidia_configure(void) pci_write_config_byte(agp_bridge->dev, NVIDIA_0_APSIZE, current_size->size_value); - /* address to map to */ - pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &apbase); - apbase &= PCI_BASE_ADDRESS_MEM_MASK; + /* address to map to */ + apbase = pci_bus_address(agp_bridge->dev, AGP_APERTURE_BAR); agp_bridge->gart_bus_addr = apbase; aplimit = apbase + (current_size->size * 1024 * 1024) - 1; pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_APBASE, apbase); |