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authorAndrei Lalaev <andrey.lalaev@gmail.com>2022-05-25 22:04:25 +0300
committerLinus Walleij <linus.walleij@linaro.org>2022-06-27 12:27:10 +0300
commitcd4c1e65a32afd003b08ad4aafe1e4d3e4e8e61b (patch)
tree900c2f3b78f284399c97c8810703c943486ac6af /drivers/bus/ti-pwmss.c
parent24d0af46d389d70de7d6465801ee1affe0629c88 (diff)
downloadlinux-cd4c1e65a32afd003b08ad4aafe1e4d3e4e8e61b.tar.xz
pinctrl: sunxi: sunxi_pconf_set: use correct offset
Some Allwinner SoCs have 2 pinctrls (PIO and R_PIO). Previous implementation used absolute pin numbering and it was incorrect for R_PIO pinctrl. It's necessary to take into account the base pin number. Fixes: 90be64e27621 ("pinctrl: sunxi: implement pin_config_set") Signed-off-by: Andrei Lalaev <andrey.lalaev@gmail.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220525190423.410609-1-andrey.lalaev@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/bus/ti-pwmss.c')
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