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authorSuzuki K Poulose <suzuki.poulose@arm.com>2016-02-23 13:49:47 +0300
committerWill Deacon <will.deacon@arm.com>2016-03-01 02:23:16 +0300
commitc66eea5f9f55f2ddf742670d35e4c9e30dc42a0a (patch)
treedf6dcaed6578f5e02f0e59392403d4923d1ed10e /drivers/bus/simple-pm-bus.c
parenta077c52f349fdeeccc3f9f3590d63fe2b116b9a5 (diff)
downloadlinux-c66eea5f9f55f2ddf742670d35e4c9e30dc42a0a.tar.xz
arm-cci: Delay PMU counter writes to pmu::pmu_enable
CCI PMU driver always reprograms the counters to a safe value (half of the counter max, = 2^31) before starting the profiling to account for extreme interrupt latencies. Also, the cost of writing to a PMU counter could be very costly on some PMUs(e.g, CCI-500). In order to ammortise the cost of programming the counters, this patch delays the counter writes to pmu::pmu_enable(). We use the PER_HES_ARCH flag to keep track of the counters which need to be programmed. Before turning on the PMU, we go through the counters that were marked for write, and perform the operation in a batch. To unify all the counter writes to pmu_enable(), this patch also makes sure that we disable-and-enable the PMU in the irq handler to program any counters that overflowed. Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Peter Zijlstra <peterz@infradead.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/bus/simple-pm-bus.c')
0 files changed, 0 insertions, 0 deletions