diff options
| author | Stephen M. Cameron <scameron@beardog.cce.hp.com> | 2011-05-03 23:52:54 +0400 |
|---|---|---|
| committer | Jens Axboe <jaxboe@fusionio.com> | 2011-05-06 18:23:45 +0400 |
| commit | 9bd3c20487b7c13d397dc11dd51e30256bf4c9b3 (patch) | |
| tree | 5fc22ec358e15644c5a86970c6366aea9cc7f693 /drivers/block/cciss.h | |
| parent | 490b94be0282c3b67f56453628ff0aaae827a670 (diff) | |
| download | linux-9bd3c20487b7c13d397dc11dd51e30256bf4c9b3.tar.xz | |
cciss: add readl after writel in interrupt mask setting code
This is to ensure the board interrupts are really off when
these functions return.
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Signed-off-by: Jens Axboe <jaxboe@fusionio.com>
Diffstat (limited to 'drivers/block/cciss.h')
| -rw-r--r-- | drivers/block/cciss.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/block/cciss.h b/drivers/block/cciss.h index 554bbd907d14..9b494392e5d5 100644 --- a/drivers/block/cciss.h +++ b/drivers/block/cciss.h @@ -239,11 +239,13 @@ static void SA5_intr_mask(ctlr_info_t *h, unsigned long val) { /* Turn interrupts on */ h->interrupts_enabled = 1; writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); + (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); } else /* Turn them off */ { h->interrupts_enabled = 0; writel( SA5_INTR_OFF, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); + (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); } } /* @@ -257,11 +259,13 @@ static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val) { /* Turn interrupts on */ h->interrupts_enabled = 1; writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); + (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); } else /* Turn them off */ { h->interrupts_enabled = 0; writel( SA5B_INTR_OFF, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); + (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); } } @@ -271,10 +275,12 @@ static void SA5_performant_intr_mask(ctlr_info_t *h, unsigned long val) if (val) { /* turn on interrupts */ h->interrupts_enabled = 1; writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); + (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); } else { h->interrupts_enabled = 0; writel(SA5_PERF_INTR_OFF, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); + (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); } } |