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| author | Jeff Garzik <jeff@garzik.org> | 2006-09-11 16:54:55 +0400 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2006-09-11 16:54:55 +0400 |
| commit | dd1dc802368154a75926491092ec9e6a939c32df (patch) | |
| tree | d30356622b57f9d993ff1c54a621c2d1f8cd31d9 /drivers/ata/ata_piix.c | |
| parent | 406176ee7ef81cec3f346ecd41286a67148e3b0c (diff) | |
| parent | 6708374178d225ef77571ed23b30e8a93c36add5 (diff) | |
| download | linux-dd1dc802368154a75926491092ec9e6a939c32df.tar.xz | |
Merge branch 'upstream-fixes' into upstream
Conflicts:
drivers/ata/ata_piix.c
Diffstat (limited to 'drivers/ata/ata_piix.c')
| -rw-r--r-- | drivers/ata/ata_piix.c | 40 |
1 files changed, 36 insertions, 4 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 1a4c03d5de9f..965b4f0ba711 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c @@ -126,7 +126,8 @@ enum { ich6_sata = 7, ich6_sata_ahci = 8, ich6m_sata_ahci = 9, - ich8_sata_ahci = 10, + ich7m_sata_ahci = 10, + ich8_sata_ahci = 11, /* constants for mapping table */ P0 = 0, /* port 0 */ @@ -226,7 +227,7 @@ static const struct pci_device_id piix_pci_tbl[] = { /* 82801GB/GR/GH (ICH7, identical to ICH6) */ { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, /* 2801GBM/GHM (ICH7M, identical to ICH6M) */ - { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, + { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich7m_sata_ahci }, /* Enterprise Southbridge 2 (where's the datasheet?) */ { 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, /* SATA Controller 1 IDE (ICH8, no datasheet yet) */ @@ -407,6 +408,24 @@ static const struct piix_map_db ich6m_map_db = { }, }; +static const struct piix_map_db ich7m_map_db = { + .mask = 0x3, + .port_enable = 0x5, + .present_shift = 4, + + /* Map 01b isn't specified in the doc but some notebooks use + * it anyway. ATM, the only case spotted carries subsystem ID + * 1025:0107. This is the only difference from ich6m. + */ + .map = { + /* PM PS SM SS MAP */ + { P0, P2, RV, RV }, /* 00b */ + { IDE, IDE, P1, P3 }, /* 01b */ + { P0, P2, IDE, IDE }, /* 10b */ + { RV, RV, RV, RV }, + }, +}; + static const struct piix_map_db ich8_map_db = { .mask = 0x3, .port_enable = 0x3, @@ -426,6 +445,7 @@ static const struct piix_map_db *piix_map_db_table[] = { [ich6_sata] = &ich6_map_db, [ich6_sata_ahci] = &ich6_map_db, [ich6m_sata_ahci] = &ich6m_map_db, + [ich7m_sata_ahci] = &ich7m_map_db, [ich8_sata_ahci] = &ich8_map_db, }; @@ -512,7 +532,7 @@ static struct ata_port_info piix_port_info[] = { .port_ops = &piix_sata_ops, }, - /* ich6_sata_ahci:8 */ + /* ich6_sata_ahci: 8 */ { .sht = &piix_sht, .flags = ATA_FLAG_SATA | @@ -536,7 +556,19 @@ static struct ata_port_info piix_port_info[] = { .port_ops = &piix_sata_ops, }, - /* ich8_sata_ahci */ + /* ich7m_sata_ahci: 10 */ + { + .sht = &piix_sht, + .host_flags = ATA_FLAG_SATA | + PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR | + PIIX_FLAG_AHCI, + .pio_mask = 0x1f, /* pio0-4 */ + .mwdma_mask = 0x07, /* mwdma0-2 */ + .udma_mask = 0x7f, /* udma0-6 */ + .port_ops = &piix_sata_ops, + }, + + /* ich8_sata_ahci: 11 */ { .sht = &piix_sht, .flags = ATA_FLAG_SATA | |