diff options
| author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2014-03-17 17:08:12 +0400 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2014-03-17 18:46:54 +0400 |
| commit | cdf457a4fe30980f7c15a894af2f954f85cd71d2 (patch) | |
| tree | 993c18facde9c31ef9fb3186e7857ee5785c906e /drivers/ata/ahci_sunxi.c | |
| parent | 1bf9d885658cbee1bc8e4324d0e27b02b1540d58 (diff) | |
| download | linux-cdf457a4fe30980f7c15a894af2f954f85cd71d2.tar.xz | |
ata: ahci_sunxi: fix code formatting
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/ata/ahci_sunxi.c')
| -rw-r--r-- | drivers/ata/ahci_sunxi.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c index 0af6cb83b23e..42d3f64e74b3 100644 --- a/drivers/ata/ahci_sunxi.c +++ b/drivers/ata/ahci_sunxi.c @@ -27,28 +27,28 @@ #include <linux/regulator/consumer.h> #include "ahci.h" -#define AHCI_BISTAFR 0x00a0 -#define AHCI_BISTCR 0x00a4 -#define AHCI_BISTFCTR 0x00a8 -#define AHCI_BISTSR 0x00ac -#define AHCI_BISTDECR 0x00b0 -#define AHCI_DIAGNR0 0x00b4 -#define AHCI_DIAGNR1 0x00b8 -#define AHCI_OOBR 0x00bc -#define AHCI_PHYCS0R 0x00c0 -#define AHCI_PHYCS1R 0x00c4 -#define AHCI_PHYCS2R 0x00c8 -#define AHCI_TIMER1MS 0x00e0 -#define AHCI_GPARAM1R 0x00e8 -#define AHCI_GPARAM2R 0x00ec -#define AHCI_PPARAMR 0x00f0 -#define AHCI_TESTR 0x00f4 -#define AHCI_VERSIONR 0x00f8 -#define AHCI_IDR 0x00fc -#define AHCI_RWCR 0x00fc -#define AHCI_P0DMACR 0x0170 -#define AHCI_P0PHYCR 0x0178 -#define AHCI_P0PHYSR 0x017c +#define AHCI_BISTAFR 0x00a0 +#define AHCI_BISTCR 0x00a4 +#define AHCI_BISTFCTR 0x00a8 +#define AHCI_BISTSR 0x00ac +#define AHCI_BISTDECR 0x00b0 +#define AHCI_DIAGNR0 0x00b4 +#define AHCI_DIAGNR1 0x00b8 +#define AHCI_OOBR 0x00bc +#define AHCI_PHYCS0R 0x00c0 +#define AHCI_PHYCS1R 0x00c4 +#define AHCI_PHYCS2R 0x00c8 +#define AHCI_TIMER1MS 0x00e0 +#define AHCI_GPARAM1R 0x00e8 +#define AHCI_GPARAM2R 0x00ec +#define AHCI_PPARAMR 0x00f0 +#define AHCI_TESTR 0x00f4 +#define AHCI_VERSIONR 0x00f8 +#define AHCI_IDR 0x00fc +#define AHCI_RWCR 0x00fc +#define AHCI_P0DMACR 0x0170 +#define AHCI_P0PHYCR 0x0178 +#define AHCI_P0PHYSR 0x017c static void sunxi_clrbits(void __iomem *reg, u32 clr_val) { |