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author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-12 06:33:59 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-12 06:33:59 +0300 |
commit | 8c930204ce76eddeb2e1af66a75f0ab2506c76e2 (patch) | |
tree | cdc3f5ac1b799efd1d54200e08848ccf2bfedb41 /drivers/ata/ahci.h | |
parent | 367262c1be4bbf23938175a93eb573b289a00027 (diff) | |
parent | e39b2bb3b72b999a04e8d295882be3255aca5ade (diff) | |
download | linux-8c930204ce76eddeb2e1af66a75f0ab2506c76e2.tar.xz |
Merge branch 'for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata updates from Tejun Heo:
"Mostly low level driver specific changes.
Two changes are somewhat noteworthy. First, Dan's patchset to support
per-port msix interrupt handling for ahci, which was tried last cycle
but had to be backed out due to a couple issues, is back and seems to
be working fine. Second, libata exception handling now uses
usleep_range() instead of msleep() for sleeps < 20ms which can make
things snappier in some corner cases"
* 'for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
libata: skip debounce delay on link resume
ata: ahci_brcmstb: disable DIPM support
ata: ahci_brcmstb: enable support for ALPM
drivers: libata-core: Use usleep_range() instead of msleep() for short sleeps (<20 ms)
sata_sx4: correctly handling failed allocation
ata: ahci_brcmstb: add support for MIPS-based platforms
ahci: qoriq: Adjust the default register values on ls1021a
ahci: qoriq: Update the default Rx watermark value
ahci: qoriq: Adjust the default register values on ls1043a
ahci: compile out msi/msix infrastructure
ata: core: fix irq description on AHCI single irq systems
ata: ahci_brcmstb: remove unused definitions
ata: ahci_brcmstb: add a quirk for MIPS-based platforms
ata: ahci_brcmstb: disable NCQ for MIPS-based platforms
ata: sata_rcar: Remove obsolete platform_device_id entries
sata_rcar: Add compatible string for r8a7795
ahci: kill 'intr_status'
ahci: switch from 'threaded' to 'hardirq' interrupt handling
ahci: per-port msix support
Diffstat (limited to 'drivers/ata/ahci.h')
-rw-r--r-- | drivers/ata/ahci.h | 27 |
1 files changed, 25 insertions, 2 deletions
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index 45586c1dbbdc..a4faa438889c 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -35,6 +35,7 @@ #ifndef _AHCI_H #define _AHCI_H +#include <linux/pci.h> #include <linux/clk.h> #include <linux/libata.h> #include <linux/phy/phy.h> @@ -237,11 +238,18 @@ enum { AHCI_HFLAG_DELAY_ENGINE = (1 << 15), /* do not start engine on port start (wait until error-handling stage) */ - AHCI_HFLAG_MULTI_MSI = (1 << 16), /* multiple PCI MSIs */ AHCI_HFLAG_NO_DEVSLP = (1 << 17), /* no device sleep */ AHCI_HFLAG_NO_FBS = (1 << 18), /* no FBS */ AHCI_HFLAG_EDGE_IRQ = (1 << 19), /* HOST_IRQ_STAT behaves as Edge Triggered */ +#ifdef CONFIG_PCI_MSI + AHCI_HFLAG_MULTI_MSI = (1 << 20), /* multiple PCI MSIs */ + AHCI_HFLAG_MULTI_MSIX = (1 << 21), /* per-port MSI-X */ +#else + /* compile out MSI infrastructure */ + AHCI_HFLAG_MULTI_MSI = 0, + AHCI_HFLAG_MULTI_MSIX = 0, +#endif /* ap->flags bits */ @@ -308,7 +316,6 @@ struct ahci_port_priv { unsigned int ncq_saw_d2h:1; unsigned int ncq_saw_dmas:1; unsigned int ncq_saw_sdb:1; - atomic_t intr_status; /* interrupts to handle */ spinlock_t lock; /* protects parent ata_port */ u32 intr_mask; /* interrupts to enable */ bool fbs_supported; /* set iff FBS is supported */ @@ -343,6 +350,7 @@ struct ahci_host_priv { * the PHY position in this array. */ struct phy **phys; + struct msix_entry *msix; /* Optional MSI-X support */ unsigned nports; /* Number of ports */ void *plat_data; /* Other platform data */ unsigned int irq; /* interrupt line */ @@ -354,6 +362,21 @@ struct ahci_host_priv { void (*start_engine)(struct ata_port *ap); }; +#ifdef CONFIG_PCI_MSI +static inline int ahci_irq_vector(struct ahci_host_priv *hpriv, int port) +{ + if (hpriv->flags & AHCI_HFLAG_MULTI_MSIX) + return hpriv->msix[port].vector; + else + return hpriv->irq + port; +} +#else +static inline int ahci_irq_vector(struct ahci_host_priv *hpriv, int port) +{ + return hpriv->irq; +} +#endif + extern int ahci_ignore_sss; extern struct device_attribute *ahci_shost_attrs[]; |