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authorMario Limonciello <mario.limonciello@amd.com>2023-03-31 19:08:42 +0300
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2023-04-06 21:41:14 +0300
commit10b6b4a8ac6120ec36555fd286eed577f7632e3b (patch)
tree776a43139db6cf801ca24a592adb3a395a0797a8 /drivers/acpi/x86
parent7e364e56293bb98cae1b55fd835f5991c4e96e7d (diff)
downloadlinux-10b6b4a8ac6120ec36555fd286eed577f7632e3b.tar.xz
ACPI: x86: utils: Add Picasso to the list for forcing StorageD3Enable
Picasso was the first APU that introduced s2idle support from AMD, and it was predating before vendors started to use `StorageD3Enable` in their firmware. Windows doesn't have problems with this hardware and NVME so it was likely on the list of hardcoded CPUs to use this behavior in Windows. Add it to the list for Linux to avoid NVME resume issues. Reported-by: Stuart Axon <stuaxo2@yahoo.com> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2449 Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/acpi/x86')
-rw-r--r--drivers/acpi/x86/utils.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c
index da5727069d85..ba420a28a4aa 100644
--- a/drivers/acpi/x86/utils.c
+++ b/drivers/acpi/x86/utils.c
@@ -213,6 +213,7 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s
disk in the system.
*/
static const struct x86_cpu_id storage_d3_cpu_ids[] = {
+ X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 24, NULL), /* Picasso */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */