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authorTakeshi Kihara <takeshi.kihara.df@renesas.com>2017-07-28 14:41:16 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2017-08-16 15:26:26 +0300
commitbad7cc19f2d7c4aafd185ad5ee29082385449355 (patch)
tree179e500f175a17baaf35381cde4fa7b093f6c61c /crypto/cts.c
parenteada11ac23438d368fd431eb8e902caa96b80902 (diff)
downloadlinux-bad7cc19f2d7c4aafd185ad5ee29082385449355.tar.xz
pinctrl: sh-pfc: r8a7795: Fix FMCLK{_C,_D} and FMIN{_C,_D} pin function definitions
This patch fixes the implementation incorrect of IPSR register value definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function. This is a correction to the incorrect implementation of IPSR register pin assignment of the specifications updated for R8A7795 ES2.0 SoC in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'crypto/cts.c')
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