diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-31 11:05:13 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-05-31 13:42:04 +0300 |
| commit | 9eaa98a63c8a34a807ba95e384aacd28fa60ddd9 (patch) | |
| tree | 96aec0f81f4f6208ff08c1580429724dbd5542d1 /crypto/crct10dif_generic.c | |
| parent | fc78a56631d13901dd8bac5efb46e8fdcd89976b (diff) | |
| download | linux-9eaa98a63c8a34a807ba95e384aacd28fa60ddd9.tar.xz | |
pinctrl: uniphier: rename macros for drive strength control
The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive
strength control. Some of the configuration registers on it have
3-bit width.
The feature will be supported in the next commit, but a problem is
that macro names are getting longer and longer in the current naming
scheme.
Before moving forward, this commit renames macros as follows:
UNIPHIER_PIN_DRV_4_8 -> UNIPHIER_PIN_DRV_1BIT
UNIPHIER_PIN_DRV_8_12_16_20 -> UNIPHIER_PIN_DRV_2BIT
UNIPHIER_PIN_DRV_FIXED_4 -> UNIPHIER_PIN_DRV_FIXED4
UNIPHIER_PIN_DRV_FIXED_5 -> UNIPHIER_PIN_DRV_FIXED5
UNIPHIER_PIN_DRV_FIXED_8 -> UNIPHIER_PIN_DRV_FIXED8
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'crypto/crct10dif_generic.c')
0 files changed, 0 insertions, 0 deletions