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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-01-29 09:55:25 +0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-01-29 09:55:25 +0400
commit6e677ef6fbe9513051bd753ae670b586e8ea7df1 (patch)
tree168b8cfad77da34a01d60d00ac5963dd5eafe8ca /arch
parente9a371100dfdfa4c9f994059d19d98c9b4fd80af (diff)
parent4b3cbc82a04485f6400cb5b227798daaa8512a23 (diff)
downloadlinux-6e677ef6fbe9513051bd753ae670b586e8ea7df1.tar.xz
Merge remote-tracking branch 'scott/next' into next
<< This contains a fix for a chroma_defconfig build break that was introduced by e6500 tablewalk support, and a device tree binding patch that missed the previous pull request due to some last-minute polishing. >>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/Kconfig1
-rw-r--r--arch/powerpc/mm/tlb_low_64e.S3
-rw-r--r--arch/powerpc/mm/tlb_nohash.c2
3 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index d15594ec213d..a5e5d2ec380b 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -532,6 +532,7 @@ config PPC_16K_PAGES
config PPC_64K_PAGES
bool "64k page size" if 44x || PPC_STD_MMU_64 || PPC_BOOK3E_64
+ depends on !PPC_FSL_BOOK3E
select PPC_HAS_HASH_64K if PPC_STD_MMU_64
config PPC_256K_PAGES
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index 16250b162375..c95eb323e9ae 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -240,6 +240,7 @@ itlb_miss_fault_bolted:
beq tlb_miss_common_bolted
b itlb_miss_kernel_bolted
+#ifdef CONFIG_PPC_FSL_BOOK3E
/*
* TLB miss handling for e6500 and derivatives, using hardware tablewalk.
*
@@ -409,7 +410,7 @@ itlb_miss_fault_e6500:
TLB_MISS_STATS_I(MMSTAT_TLB_MISS_NORM_FAULT)
tlb_epilog_bolted
b exc_instruction_storage_book3e
-
+#endif /* CONFIG_PPC_FSL_BOOK3E */
/**********************************************************************
* *
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 735839b74dc5..b37a58e1c92d 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -557,10 +557,12 @@ static void setup_mmu_htw(void)
patch_exception(0x1c0, exc_data_tlb_miss_htw_book3e);
patch_exception(0x1e0, exc_instruction_tlb_miss_htw_book3e);
break;
+#ifdef CONFIG_PPC_FSL_BOOK3E
case PPC_HTW_E6500:
patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e);
patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e);
break;
+#endif
}
pr_info("MMU: Book3E HW tablewalk %s\n",
book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported");