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authorArnd Bergmann <arnd@arndb.de>2016-04-26 00:46:15 +0300
committerArnd Bergmann <arnd@arndb.de>2016-04-26 00:46:15 +0300
commitc8f7341b29126486476dfc669f8f00ebefbe1709 (patch)
treec67c6e48413c9d0f214c81be14c1b466e31dca12 /arch
parent26a8eb59e0a8da5a662d7c22334af9952edbf6ab (diff)
parent605aa5e48bfc3dbf0272bc4aac8674e06c19c1b3 (diff)
downloadlinux-c8f7341b29126486476dfc669f8f00ebefbe1709.tar.xz
Merge tag 'tegra-for-4.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "soc/tegra: Changes for v4.7-rc1" from Thierry Reding: This contains a bunch of preparatory patches to the PMC driver which are a prerequisite to moving the driver to generic power domains. * tag 'tegra-for-4.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: Update NVIDIA PMC for Tegra soc/tegra: pmc: Wait for powergate state to change soc/tegra: pmc: Ensure GPU partition can be toggled on/off by PMC soc/tegra: pmc: Remove additional check for a valid partition soc/tegra: pmc: Fix verification of valid partitions soc/tegra: pmc: Fix testing of powergate state soc/tegra: pmc: Change powergate and rail IDs to be an unsigned type soc/tegra: pmc: Protect public functions from potential race conditions soc/tegra: pmc: Restore base address on probe failure soc/tegra: pmc: Remove non-existing L2 partition for Tegra124 soc/tegra: pmc: Remove non-existing power partitions for Tegra210 soc/tegra: pmc: Remove debugfs entry on probe failure soc/tegra: pmc: Fix sparse warning for tegra_pmc_init_tsense_reset() soc/tegra: pmc: Add missing structure members to kernel-doc
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/platsmp.c16
1 files changed, 3 insertions, 13 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index f3f61dbbda97..75620ae73913 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -108,19 +108,9 @@ static int tegra30_boot_secondary(unsigned int cpu, struct task_struct *idle)
* be un-gated by un-toggling the power gate register
* manually.
*/
- if (!tegra_pmc_cpu_is_powered(cpu)) {
- ret = tegra_pmc_cpu_power_on(cpu);
- if (ret)
- return ret;
-
- /* Wait for the power to come up. */
- timeout = jiffies + msecs_to_jiffies(100);
- while (!tegra_pmc_cpu_is_powered(cpu)) {
- if (time_after(jiffies, timeout))
- return -ETIMEDOUT;
- udelay(10);
- }
- }
+ ret = tegra_pmc_cpu_power_on(cpu);
+ if (ret)
+ return ret;
remove_clamps:
/* CPU partition is powered. Enable the CPU clock. */