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authorMaxime Ripard <maxime.ripard@free-electrons.com>2015-01-11 22:33:44 +0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-01-21 11:59:17 +0300
commit121b96cd9d7e6ec090331c4e7ef1298198bd8522 (patch)
treec2b1e2d70e539d88b22384ef11e08f1388f02471 /arch
parent19f3af1df6d714dbfa89b2357efffd41cbc6b82c (diff)
downloadlinux-121b96cd9d7e6ec090331c4e7ef1298198bd8522.tar.xz
ARM: sun6i: Enable ARM arch timers
The A31 has non-initialized architected timers, without CNTFRQ or CNTVOFF set by the Allwinner's bootloader. Use the new DT property for such case, and enable the arch timers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 4ae3e2eef679..0c17079b4636 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -87,6 +87,16 @@
};
};
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ clock-frequency = <24000000>;
+ arm,cpu-registers-not-fw-configured;
+ };
+
cpus {
enable-method = "allwinner,sun6i-a31";
#address-cells = <1>;