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authorMihai Caraman <mihai.caraman@freescale.com>2014-07-23 20:06:19 +0400
committerAlexander Graf <agraf@suse.de>2014-07-28 17:23:13 +0400
commit9c0d4e0dcf69b1ab3a9f8debebd119f53964cb57 (patch)
tree56dcb0ce34e39ee01045b3a947a1a3d046a7fc4e /arch
parentb5741bb3d4dc751a76f6caaaec8e2b271ff8ca48 (diff)
downloadlinux-9c0d4e0dcf69b1ab3a9f8debebd119f53964cb57.tar.xz
KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1
Add mising defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() for Book3E. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/mmu-book3e.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 8d24f788fd09..cd4f04a74802 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,9 +40,11 @@
/* MAS registers bit definitions */
-#define MAS0_TLBSEL_MASK 0x30000000
-#define MAS0_TLBSEL_SHIFT 28
-#define MAS0_TLBSEL(x) (((x) << MAS0_TLBSEL_SHIFT) & MAS0_TLBSEL_MASK)
+#define MAS0_TLBSEL_MASK 0x30000000
+#define MAS0_TLBSEL_SHIFT 28
+#define MAS0_TLBSEL(x) (((x) << MAS0_TLBSEL_SHIFT) & MAS0_TLBSEL_MASK)
+#define MAS0_GET_TLBSEL(mas0) (((mas0) & MAS0_TLBSEL_MASK) >> \
+ MAS0_TLBSEL_SHIFT)
#define MAS0_ESEL_MASK 0x0FFF0000
#define MAS0_ESEL_SHIFT 16
#define MAS0_ESEL(x) (((x) << MAS0_ESEL_SHIFT) & MAS0_ESEL_MASK)
@@ -60,6 +62,7 @@
#define MAS1_TSIZE_MASK 0x00000f80
#define MAS1_TSIZE_SHIFT 7
#define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
+#define MAS1_GET_TSIZE(mas1) (((mas1) & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT)
#define MAS2_EPN (~0xFFFUL)
#define MAS2_X0 0x00000040