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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-11-07 16:49:03 +0300 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-11-25 09:11:22 +0300 |
commit | e734dd63cc42febee4730ecef97ae32d1be41e2b (patch) | |
tree | 03f861044388961cd317ec4706ee239c8b21edb8 /arch | |
parent | f6cee260309807acb12ff84524ffc84720c2904b (diff) | |
download | linux-e734dd63cc42febee4730ecef97ae32d1be41e2b.tar.xz |
powerpc: Typo s/use use/use/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/include/asm/nohash/32/pte-40x.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h b/arch/powerpc/include/asm/nohash/32/pte-40x.h index 661f4599f2fc..12c6811e344b 100644 --- a/arch/powerpc/include/asm/nohash/32/pte-40x.h +++ b/arch/powerpc/include/asm/nohash/32/pte-40x.h @@ -33,7 +33,7 @@ * is cleared in the TLB miss handler before the TLB entry is loaded. * - All other bits of the PTE are loaded into TLBLO without * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for - * software PTE bits. We actually use use bits 21, 24, 25, and + * software PTE bits. We actually use bits 21, 24, 25, and * 30 respectively for the software bits: ACCESSED, DIRTY, RW, and * PRESENT. */ |