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authorVaradarajan Narayanan <varada@codeaurora.org>2017-07-03 10:47:13 +0300
committerAndy Gross <andy.gross@linaro.org>2017-08-08 22:52:58 +0300
commit75ea98acf7c62bf9dbe81eb5dd331ff670a649e5 (patch)
tree4798b8de987e6649ffc8ea550479585317175b16 /arch
parentba4ca27ba9a03d0adf3949ba5033edcb3bb3c53b (diff)
downloadlinux-75ea98acf7c62bf9dbe81eb5dd331ff670a649e5.tar.xz
ARM: dts: ipq4019: Move xo and timer nodes to SoC dtsi
The node for xo and timer belong to the SoC DTS file. Else, new board DT files may not inherit these nodes. Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi19
-rw-r--r--arch/arm/boot/dts/qcom-ipq4019.dtsi15
2 files changed, 15 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index 1ce253d0f72f..c055a5785769 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -20,26 +20,7 @@
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
compatible = "qcom,ipq4019";
- clocks {
- xo: xo {
- compatible = "fixed-clock";
- clock-frequency = <48000000>;
- #clock-cells = <0>;
- };
- };
-
soc {
-
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <1 2 0xf08>,
- <1 3 0xf08>,
- <1 4 0xf08>,
- <1 1 0xf08>;
- clock-frequency = <48000000>;
- };
-
pinctrl@1000000 {
serial_pins: serial_pinmux {
mux {
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 0eeff09856ba..bd4b3c52d868 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -96,6 +96,21 @@
clock-frequency = <32768>;
#clock-cells = <0>;
};
+
+ xo: xo {
+ compatible = "fixed-clock";
+ clock-frequency = <48000000>;
+ #clock-cells = <0>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 2 0xf08>,
+ <1 3 0xf08>,
+ <1 4 0xf08>,
+ <1 1 0xf08>;
+ clock-frequency = <48000000>;
};
soc {