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author | Chris Brandt <chris.brandt@renesas.com> | 2017-03-31 00:16:09 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-03-22 11:17:46 +0300 |
commit | 75280515507bb41a2d7a52971f3a60070060b364 (patch) | |
tree | 70fe6bfff39193b42140dd0da5987706b5285684 /arch | |
parent | 14c63f375b9a94cb39f9b8a669a9d6e530e6bfa9 (diff) | |
download | linux-75280515507bb41a2d7a52971f3a60070060b364.tar.xz |
ARM: dts: r7s72100: fix ethernet clock parent
[ Upstream commit 91a7c50cb4fabfba218549dfa84356069918bfbf ]
Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not
the 33MHz Peripheral 0 (P0) clock.
Fixes: 969244f9c720 ("ARM: dts: r7s72100: add ethernet clock to device tree")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index fb9ef9ca120e..959e3edf367b 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -112,7 +112,7 @@ #clock-cells = <1>; compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0xfcfe0430 4>; - clocks = <&p0_clk>; + clocks = <&b_clk>; clock-indices = <R7S72100_CLK_ETHER>; clock-output-names = "ether"; }; |