diff options
| author | Nishanth Menon <nm@ti.com> | 2014-05-16 14:46:00 +0400 |
|---|---|---|
| committer | Tero Kristo <t-kristo@ti.com> | 2014-06-06 21:33:40 +0400 |
| commit | 7e148070001ae82df08966199580a29b934e3bf3 (patch) | |
| tree | b15538c8e4192a723fef5ba6b81d4bde6fbd26a2 /arch | |
| parent | b4be018921879ba7452379af8fb7320833a12bd4 (diff) | |
| download | linux-7e148070001ae82df08966199580a29b934e3bf3.tar.xz | |
ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing with higher frequencies
OMAP5432, DRA75x and DRA72x have MPU DPLLs that need Duty Cycle
Correction(DCC) to operate safely at frequencies >= 1.4GHz.
Switch to "ti,omap5-mpu-dpll-clock" compatible property which provides
this support.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/dra7xx-clocks.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap54xx-clocks.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index 30160348934c..264b9caa9eef 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -277,7 +277,7 @@ dpll_mpu_ck: dpll_mpu_ck { #clock-cells = <0>; - compatible = "ti,omap4-dpll-clock"; + compatible = "ti,omap5-mpu-dpll-clock"; clocks = <&sys_clkin1>, <&mpu_dpll_hs_clk_div>; reg = <0x0160>, <0x0164>, <0x016c>, <0x0168>; }; diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi index d487fdab3921..465505cada59 100644 --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi @@ -362,7 +362,7 @@ dpll_mpu_ck: dpll_mpu_ck { #clock-cells = <0>; - compatible = "ti,omap4-dpll-clock"; + compatible = "ti,omap5-mpu-dpll-clock"; clocks = <&sys_clkin>, <&mpu_dpll_hs_clk_div>; reg = <0x0160>, <0x0164>, <0x016c>, <0x0168>; }; |