diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-05-29 03:02:12 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-06-06 03:15:18 +0400 |
| commit | aa32374aaa2e516a9b0719477efae0782a62a79e (patch) | |
| tree | 94189adc9e155c26c96099a1f2962dea6750e892 /arch | |
| parent | 7155262e180d3b50fdea0f58f3329d9ae81ef80b (diff) | |
| download | linux-aa32374aaa2e516a9b0719477efae0782a62a79e.tar.xz | |
[MIPS] SB1: Only pass1 FPUs are broken beyond recovery.
The wrong revision number in the check was forcing a fallback to FPU
emulation for all SB1 cores in 2.6.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index bef3e2dc7c52..8c2c359a05f4 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -655,7 +655,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c) case PRID_IMP_SB1: c->cputype = CPU_SB1; /* FPU in pass1 is known to have issues. */ - if ((c->processor_id & 0xff) < 0x20) + if ((c->processor_id & 0xff) < 0x02) c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); break; case PRID_IMP_SB1A: |