diff options
| author | David Brown <davidb@codeaurora.org> | 2011-05-12 12:28:01 +0400 |
|---|---|---|
| committer | David Brown <davidb@codeaurora.org> | 2011-08-01 15:57:59 +0400 |
| commit | 10eb5f6bcbdc5e460e5500e1dbc39b2e7713ebfd (patch) | |
| tree | 9ff483903277f697441c75fa535f4733b82b7d1c /arch | |
| parent | 2e01d2c593d1cc5ed48cab6c07493185e4ac7a68 (diff) | |
| download | linux-10eb5f6bcbdc5e460e5500e1dbc39b2e7713ebfd.tar.xz | |
msm: gpio: Remove ifdefs on gpio chip registers
Select the GPIO register configuration at runtime rather than through
idefs.
Change-Id: I02ea0a3d61bc81669f32097c32420f0688552231
Signed-off-by: David Brown <davidb@codeaurora.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-msm/gpio.c | 33 |
1 files changed, 26 insertions, 7 deletions
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c index 335afbd97c1d..e96199dd14d0 100644 --- a/arch/arm/mach-msm/gpio.c +++ b/arch/arm/mach-msm/gpio.c @@ -20,6 +20,7 @@ #include <linux/io.h> #include <linux/irq.h> #include <linux/module.h> +#include <mach/cpu.h> #include "gpio_hw.h" #include "gpiomux.h" @@ -189,15 +190,19 @@ static void msm_gpio_free(struct gpio_chip *chip, unsigned offset) #define msm_gpio_free NULL #endif -struct msm_gpio_chip msm_gpio_chips[] = { -#if defined(CONFIG_ARCH_MSM7X00A) +static struct msm_gpio_chip *msm_gpio_chips; +static int msm_gpio_count; + +static struct msm_gpio_chip msm_gpio_chips_msm7x01[] = { MSM_GPIO_BANK(MSM7X00, 0, 0, 15), MSM_GPIO_BANK(MSM7X00, 1, 16, 42), MSM_GPIO_BANK(MSM7X00, 2, 43, 67), MSM_GPIO_BANK(MSM7X00, 3, 68, 94), MSM_GPIO_BANK(MSM7X00, 4, 95, 106), MSM_GPIO_BANK(MSM7X00, 5, 107, 121), -#elif defined(CONFIG_ARCH_MSM7X30) +}; + +static struct msm_gpio_chip msm_gpio_chips_msm7x30[] = { MSM_GPIO_BANK(MSM7X30, 0, 0, 15), MSM_GPIO_BANK(MSM7X30, 1, 16, 43), MSM_GPIO_BANK(MSM7X30, 2, 44, 67), @@ -206,7 +211,9 @@ struct msm_gpio_chip msm_gpio_chips[] = { MSM_GPIO_BANK(MSM7X30, 5, 107, 133), MSM_GPIO_BANK(MSM7X30, 6, 134, 150), MSM_GPIO_BANK(MSM7X30, 7, 151, 181), -#elif defined(CONFIG_ARCH_QSD8X50) +}; + +static struct msm_gpio_chip msm_gpio_chips_qsd8x50[] = { MSM_GPIO_BANK(QSD8X50, 0, 0, 15), MSM_GPIO_BANK(QSD8X50, 1, 16, 42), MSM_GPIO_BANK(QSD8X50, 2, 43, 67), @@ -215,7 +222,6 @@ struct msm_gpio_chip msm_gpio_chips[] = { MSM_GPIO_BANK(QSD8X50, 5, 104, 121), MSM_GPIO_BANK(QSD8X50, 6, 122, 152), MSM_GPIO_BANK(QSD8X50, 7, 153, 164), -#endif }; static void msm_gpio_irq_ack(struct irq_data *d) @@ -311,7 +317,7 @@ static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) int i, j, mask; unsigned val; - for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) { + for (i = 0; i < msm_gpio_count; i++) { struct msm_gpio_chip *msm_chip = &msm_gpio_chips[i]; val = readl(msm_chip->regs.int_status); val &= msm_chip->int_enable[0]; @@ -342,6 +348,19 @@ static int __init msm_init_gpio(void) { int i, j = 0; + if (cpu_is_msm7x01()) { + msm_gpio_chips = msm_gpio_chips_msm7x01; + msm_gpio_count = ARRAY_SIZE(msm_gpio_chips_msm7x01); + } else if (cpu_is_msm7x30()) { + msm_gpio_chips = msm_gpio_chips_msm7x30; + msm_gpio_count = ARRAY_SIZE(msm_gpio_chips_msm7x30); + } else if (cpu_is_qsd8x50()) { + msm_gpio_chips = msm_gpio_chips_qsd8x50; + msm_gpio_count = ARRAY_SIZE(msm_gpio_chips_qsd8x50); + } else { + return 0; + } + for (i = FIRST_GPIO_IRQ; i < FIRST_GPIO_IRQ + NR_GPIO_IRQS; i++) { if (i - FIRST_GPIO_IRQ >= msm_gpio_chips[j].chip.base + @@ -353,7 +372,7 @@ static int __init msm_init_gpio(void) set_irq_flags(i, IRQF_VALID); } - for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) { + for (i = 0; i < msm_gpio_count; i++) { spin_lock_init(&msm_gpio_chips[i].lock); writel(0, msm_gpio_chips[i].regs.int_en); gpiochip_add(&msm_gpio_chips[i].chip); |