diff options
| author | Will Deacon <will.deacon@arm.com> | 2012-03-06 20:34:22 +0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-03-07 13:40:49 +0400 |
| commit | 99c1745b9c76910e195889044f914b4898b7c9a5 (patch) | |
| tree | f94661a5e2e6b663000c6f4fdf3a2311f2554f7d /arch | |
| parent | 5727347180ebc6b4a866fcbe00dcb39cc03acb37 (diff) | |
| download | linux-99c1745b9c76910e195889044f914b4898b7c9a5.tar.xz | |
ARM: 7355/1: perf: clear overflow flag when disabling counter on ARMv7 PMU
When disabling a counter on an ARMv7 PMU, we should also clear the
overflow flag in case an overflow occurred whilst stopping the counter.
This prevents a spurious overflow being picked up later and leading to
either false accounting or a NULL dereference.
Cc: <stable@vger.kernel.org>
Reported-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/kernel/perf_event_v7.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 6f488610f8fc..050cc8bf7246 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx) counter = ARMV7_IDX_TO_COUNTER(idx); asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter))); + isb(); + /* Clear the overflow flag in case an interrupt is pending. */ + asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter))); + isb(); + return idx; } |