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| author | Juergen Gross <jgross@suse.com> | 2024-10-04 13:22:12 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-10-17 16:26:48 +0300 |
| commit | c96de97cf266590ff2f50cc46985813ca53c9e06 (patch) | |
| tree | 5da6be917c3229b5531b6f0216dcdfba4d9ea25b /arch | |
| parent | 10b783b6749be3166c38fbcbeb06968415172ffe (diff) | |
| download | linux-c96de97cf266590ff2f50cc46985813ca53c9e06.tar.xz | |
x86/xen: mark boot CPU of PV guest in MSR_IA32_APICBASE
[ Upstream commit bf56c410162dbf2e27906acbdcd904cbbfdba302 ]
Recent topology checks of the x86 boot code uncovered the need for
PV guests to have the boot cpu marked in the APICBASE MSR.
Fixes: 9d22c96316ac ("x86/topology: Handle bogus ACPI tables correctly")
Reported-by: Niels Dettenbach <nd@syndicat.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/xen/enlighten_pv.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 2c12ae42dc8b..d6818c6cafda 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1032,6 +1032,10 @@ static u64 xen_do_read_msr(unsigned int msr, int *err) switch (msr) { case MSR_IA32_APICBASE: val &= ~X2APIC_ENABLE; + if (smp_processor_id() == 0) + val |= MSR_IA32_APICBASE_BSP; + else + val &= ~MSR_IA32_APICBASE_BSP; break; } return val; |