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author | Arnd Bergmann <arnd@arndb.de> | 2021-02-10 01:32:54 +0300 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2021-02-10 01:32:54 +0300 |
commit | 090e502e4e63c608ef8497d295feeb9743ef67b7 (patch) | |
tree | 5b076b6e0d0ea78c1efb1c209917538dd30ed23b /arch | |
parent | d30337da8677cd73cb19444436b311c13e57356f (diff) | |
parent | b7ff3a447d100c999d9848353ef8a4046831d893 (diff) | |
download | linux-090e502e4e63c608ef8497d295feeb9743ef67b7.tar.xz |
Merge tag 'socfpga_dts_fix_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes
SoCFPGA Agilex fix for v5.12
- Fix PHY interface register offset for GMACs
* tag 'socfpga_dts_fix_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: agilex: fix phy interface bit shift for gmac1 and gmac2
Link: https://lore.kernel.org/r/20210208203703.36109-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index e1c0fcba5c20..07c099b4ed5b 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -166,7 +166,7 @@ rx-fifo-depth = <16384>; snps,multicast-filter-bins = <256>; iommus = <&smmu 2>; - altr,sysmgr-syscon = <&sysmgr 0x48 8>; + altr,sysmgr-syscon = <&sysmgr 0x48 0>; clocks = <&clkmgr AGILEX_EMAC1_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>; clock-names = "stmmaceth", "ptp_ref"; status = "disabled"; @@ -184,7 +184,7 @@ rx-fifo-depth = <16384>; snps,multicast-filter-bins = <256>; iommus = <&smmu 3>; - altr,sysmgr-syscon = <&sysmgr 0x4c 16>; + altr,sysmgr-syscon = <&sysmgr 0x4c 0>; clocks = <&clkmgr AGILEX_EMAC2_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>; clock-names = "stmmaceth", "ptp_ref"; status = "disabled"; |