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author | Max Filippov <jcmvbkbc@gmail.com> | 2012-10-15 03:55:38 +0400 |
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committer | Chris Zankel <chris@zankel.net> | 2012-10-16 08:48:08 +0400 |
commit | bc5378fcba974317f9657c4fdc78af227e1e1068 (patch) | |
tree | 998b8f8badf1d7a5dc0fd796f3e8501f8c5394ae /arch/xtensa/include/asm/timex.h | |
parent | f4349b6e01c8927a04795885702a173b6a60573c (diff) | |
download | linux-bc5378fcba974317f9657c4fdc78af227e1e1068.tar.xz |
xtensa: reorganize SR referencing
- reference SRs by names where possible, not by numbers;
- get rid of __stringify around SR names where possible;
- remove unneeded SR names from asm/regs.h;
- add SREG_ prefix to remaining SR names;
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/include/asm/timex.h')
-rw-r--r-- | arch/xtensa/include/asm/timex.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/xtensa/include/asm/timex.h b/arch/xtensa/include/asm/timex.h index 053bc4272106..175b3d5e1b01 100644 --- a/arch/xtensa/include/asm/timex.h +++ b/arch/xtensa/include/asm/timex.h @@ -63,10 +63,10 @@ extern cycles_t cacheflush_time; * Register access. */ -#define WSR_CCOUNT(r) asm volatile ("wsr %0,"__stringify(CCOUNT) :: "a" (r)) -#define RSR_CCOUNT(r) asm volatile ("rsr %0,"__stringify(CCOUNT) : "=a" (r)) -#define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(CCOMPARE)"+"__stringify(x) :: "a"(r)) -#define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(CCOMPARE)"+"__stringify(x) : "=a"(r)) +#define WSR_CCOUNT(r) asm volatile ("wsr %0, ccount" :: "a" (r)) +#define RSR_CCOUNT(r) asm volatile ("rsr %0, ccount" : "=a" (r)) +#define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) :: "a"(r)) +#define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) : "=a"(r)) static inline unsigned long get_ccount (void) { |