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author | Andy Lutomirski <luto@kernel.org> | 2019-07-14 18:23:14 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2019-07-22 11:12:32 +0300 |
commit | 229b969b3d38bc28bcd55841ee7ca9a9afb922f3 (patch) | |
tree | 53ebd4fc7d0878ae76c3c30b4191e7e965146195 /arch/x86/xen/enlighten_pv.c | |
parent | 5f9e832c137075045d15cd6899ab0505cfb2ca4b (diff) | |
download | linux-229b969b3d38bc28bcd55841ee7ca9a9afb922f3.tar.xz |
x86/apic: Initialize TPR to block interrupts 16-31
The APIC, per spec, is fundamentally confused and thinks that interrupt
vectors 16-31 are valid. This makes no sense -- the CPU reserves vectors
0-31 for exceptions (faults, traps, etc). Obviously, no device should
actually produce an interrupt with vector 16-31, but robustness can be
improved by setting the APIC TPR class to 1, which will prevent delivery of
an interrupt with a vector below 32.
Note: This is *not* intended as a security measure against attackers who
control malicious hardware. Any PCI or similar hardware that can be
controlled by an attacker MUST be behind a functional IOMMU that remaps
interrupts. The purpose of this change is to reduce the chance that a
certain class of device malfunctions crashes the kernel in hard-to-debug
ways.
Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/dc04a9f8b234d7b0956a8d2560b8945bcd9c4bf7.1563117760.git.luto@kernel.org
Diffstat (limited to 'arch/x86/xen/enlighten_pv.c')
0 files changed, 0 insertions, 0 deletions