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authorMauro Carvalho Chehab <mchehab@redhat.com>2013-01-25 00:49:18 +0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-01-25 00:49:18 +0400
commita32f7d1ad3744914273c6907204c2ab3b5d496a0 (patch)
tree1c5ae321ee85665707177547c07810ff7e09e1ab /arch/x86/pci/mrst.c
parent6b9e50c463efc5c361496ae6a895cc966ff8025b (diff)
parent68d6f84ba0c47e658beff3a4bf0c43acee4b4690 (diff)
downloadlinux-a32f7d1ad3744914273c6907204c2ab3b5d496a0.tar.xz
Merge branch 'v4l_for_linus' into staging/for_v3.9
* v4l_for_linus: (464 commits) [media] uvcvideo: Set error_idx properly for S_EXT_CTRLS failures [media] uvcvideo: Cleanup leftovers of partial revert [media] uvcvideo: Return -EACCES when trying to set a read-only control Linux 3.8-rc3 mm: reinstante dropped pmd_trans_splitting() check cred: Remove tgcred pointer from struct cred drm/ttm: fix fence locking in ttm_buffer_object_transfer ARM: clps711x: Fix bad merge of clockevents setup ARM: highbank: save and restore L2 cache and GIC on suspend ARM: highbank: add a power request clear ARM: highbank: fix secondary boot and hotplug ARM: highbank: fix typos with hignbank in power request functions ARM: dts: fix highbank cpu mpidr values ARM: dts: add device_type prop to cpu nodes on Calxeda platforms drm/prime: drop reference on imported dma-buf come from gem xen/netfront: improve truesize tracking ARM: mx5: Fix MX53 flexcan2 clock ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array sctp: fix Kconfig bug in default cookie hmac selection EDAC: Cleanup device deregistering path ... Conflicts: drivers/media/pci/dm1105/dm1105.c drivers/media/platform/soc_camera/mx2_camera.c
Diffstat (limited to 'arch/x86/pci/mrst.c')
-rw-r--r--arch/x86/pci/mrst.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
index e14a2ff708b5..6eb18c42a28a 100644
--- a/arch/x86/pci/mrst.c
+++ b/arch/x86/pci/mrst.c
@@ -247,7 +247,7 @@ int __init pci_mrst_init(void)
/* Langwell devices are not true pci devices, they are not subject to 10 ms
* d3 to d0 delay required by pci spec.
*/
-static void __devinit pci_d3delay_fixup(struct pci_dev *dev)
+static void pci_d3delay_fixup(struct pci_dev *dev)
{
/* PCI fixups are effectively decided compile time. If we have a dual
SoC/non-SoC kernel we don't want to mangle d3 on non SoC devices */
@@ -262,7 +262,7 @@ static void __devinit pci_d3delay_fixup(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_d3delay_fixup);
-static void __devinit mrst_power_off_unused_dev(struct pci_dev *dev)
+static void mrst_power_off_unused_dev(struct pci_dev *dev)
{
pci_set_power_state(dev, PCI_D3hot);
}
@@ -275,7 +275,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0815, mrst_power_off_unused_dev);
/*
* Langwell devices reside at fixed offsets, don't try to move them.
*/
-static void __devinit pci_fixed_bar_fixup(struct pci_dev *dev)
+static void pci_fixed_bar_fixup(struct pci_dev *dev)
{
unsigned long offset;
u32 size;